[{"data":1,"prerenderedAt":262},["ShallowReactive",2],{"finding:a-6-f16-packed-rebench":3,"finding-runs:a-6-f16-packed-rebench":218,"finding-related:a-6-f16-packed-rebench":219},{"meta":4,"impact":32,"sections":39},{"id":5,"title":6,"subtitle":7,"eyebrow":8,"date":9,"status":10,"category":11,"polarity":12,"axes":13,"tags":15,"task_code":26,"related_runs":27,"related_findings":28},"a-6-f16-packed-rebench","A.6 再評価 (Phase D 文脈) — feat.G f16 packed の ROI 上限 ~3.3%、M5 gate margin 0.11 dB と PSNR drift リスクが干渉、再着手非推奨","User task brief は「memory 半減 \u002F 20-40% wallclock 改善」期待で再着手を指示したが、orientation 段階で 3 つの factual error を発見: (1) Splat2DPacked は実際は \u003Cstrong>32 byte\u003C\u002Fstrong> (36→18 ではない、RGB のみ f16、xy+conic+α は f32 維持)、(2) bandwidth 削減は \u003Cstrong>-11%\u003C\u002Fstrong> (-50% ではない)、(3) Phase D 30k memory footprint は packed で \u003Cstrong>~12 MB\u003C\u002Fstrong> (6.75 MB ではない)。bound math: rasterize fwd+bwd の wallclock 比率が 83k 時 ~10% → 375k で best-case ~30% に成長しても、11% × 30% = \u003Cstrong>~3.3% wallclock 上限\u003C\u002Fstrong>。これは旧評価 ~1% の 3 倍だが、user brief の 20-40% 期待からは 6-12× 下回り、また M5 Lego val gate margin (+0.11 dB) より RGB f16 量子化誤差 (0.1-0.5 dB 想定) の方が大きく、M5 gate を割る可能性。trainer 統合 ~2.5 h work × 期待 ROI 1-3% × M5 regression risk を考慮し再着手 reject。bench 不実施 (orientation のみで決着)。","Investigation · A.6 Phase D rebench (orientation halt)","2026-05-25","stable","spec","negative",[14],3,[16,17,18,19,20,21,22,23,12,24,25],"phase-5","a-6","feat-g","f16","packed","splat2d","phase-d","bound-check","premise-correction","deferred","A.6 (rebench)",[],[29,30,31],"a-6-feat-g-packed-investigation","p1-d-stage2-30k-results","feat_g_f16_packed_roi",{"summary":33,"rank":34,"verdict":35,"delta_psnr":36,"delta_wallclock":37,"delta_splats":38},"User task brief は Phase D 375k 文脈で旧 A.6 (~1% wallclock ROI) を再評価し f16 packed の真の bandwidth ROI を引き出すことを期待したが、orientation 段階で feat.G 実装の事実関係を確認した結果、3 つの factual error (32 byte \u002F -11% \u002F ~12 MB) が判明。bound math (rasterize fwd+bwd share 上限 30% × bandwidth 削減 11%) より wallclock 上限 ~3.3%、user brief の 20-40% 期待は実装の物理特性と整合しない。加えて M5 Lego val gate margin (+0.11 dB) より RGB f16 round-trip 誤差 (rel 5e-4、abs ~0.5 dB drift 想定) の方が大きい可能性、再着手は M5 gate を割るリスク。orientation 段階で halt、bench 不実施。","low","halt-orientation-only","implement 時 0.1-0.5 dB regression risk (M5 margin 0.11 dB 食い込みあり)","実装 ceiling ~3.3% (旧 ~1% より上限上昇だが期待値 20-40% に遠く及ばず)","0 (struct layout 変更のみ、splat count に影響なし)",[40,43,48,51,92,94,97,101,103,111,114,116,144,146,148,155,158,160,162,193,195,197,202,204,208,210],{"type":41,"text":42},"lead","\u003Cstrong>User task brief は事実関係に 3 つの error\u003C\u002Fstrong> を含み、それが \"再着手すれば 20-40% wallclock ROI が見える\" 期待を構築していた。orientation で実コード (commit \u003Ccode>5a22770\u003C\u002Fcode> \u002F \u003Ccode>d01d6cf\u003C\u002Fcode> \u002F \u003Ccode>ba740a4\u003C\u002Fcode>) と既存 memory (\u003Ccode>feat_g_f16_packed_roi.md\u003C\u002Fcode>) を照合した結果、bound math 上限 ~3.3% \u002F M5 gate regression risk \u002F trainer 統合 ~2.5 h cost の組合せで \u003Cstrong>再着手は net-negative\u003C\u002Fstrong>。bench 不実施で halt、本 finding が durable な記録。",{"type":44,"label":45,"variant":46,"text":47},"callout","Headline (orientation halt, factual correction)","warning","\u003Cstrong>User task brief の事実関係 error 3 件 + bound math 上限低\u003C\u002Fstrong>: (1) Splat2DPacked は 36→\u003Cstrong>32 byte\u003C\u002Fstrong> (18 byte は誤、RGB のみ f16 \u002F xy+conic+α は f32 維持)、(2) bandwidth 削減は \u003Cstrong>-11%\u003C\u002Fstrong> (-50% 半減ではない)、(3) Phase D 30k memory footprint は packed で \u003Cstrong>~12 MB\u003C\u002Fstrong> (375k × 32 byte、6.75 MB ではない)。 wallclock ROI 上限 bound = (rasterize fwd+bwd wallclock share 30% 仮定) × (bandwidth 削減 11%) = \u003Cstrong>~3.3%\u003C\u002Fstrong>。M5 Lego val gate margin は +0.11 dB (36.106 vs 36 dB target)、RGB f16 round-trip rel error 5e-4 が compositing 累積で 0.1-0.5 dB 程度 PSNR drift 起こすと M5 を割る。trainer 統合 ~2.5 h work × bounded ROI × M5 regression risk で \u003Cstrong>再着手 reject\u003C\u002Fstrong>。",{"type":49,"text":50},"heading","1. user task brief の factual error と実装現実",{"type":52,"columns":53,"align":58,"rows":60,"caption":91},"table",[54,55,56,57],"項目","user brief 主張","feat.G 実装現実 (commit 確認済)","出典",[59,59,59,59],"left",[61,66,71,76,81,86],[62,63,64,65],"Splat2D size","36 byte (正しい)","36 byte = 9 × f32","\u003Ccode>splat-core\u002Ftypes.rs:14-25\u003C\u002Fcode>",[67,68,69,70],"Splat2DPacked size","**18 byte (半減)**","**32 byte** (6 × f32 + 4 × f16)","\u003Ccode>5a22770\u003C\u002Fcode> commit body: \"layout (32 bytes)\"",[72,73,74,75],"bandwidth 削減","**memory bandwidth 半減 (50%)**","**11% 削減** (32\u002F36 = 0.89)","\u003Ccode>ba740a4\u003C\u002Fcode> commit body: \"global memory bandwidth ~11% 削減\"",[77,78,79,80],"packed の f16 化対象","全 9 field f16","**RGB 3 個のみ f16** (xy+conic+α は f32 維持)","\u003Ccode>5a22770\u003C\u002Fcode> body: \"color_rgb_pad_bits ... 4 u16 = 8 bytes\"",[82,83,84,85],"Phase D 30k memory","13.5 MB → **6.75 MB 帯**","13.5 MB → **~12 MB** (375k × 32 byte)","計算: 375,146 × 32 = 12.0 MB",[87,88,89,90],"期待 wallclock ROI","**-20〜-40%**","**~1-3% 上限** (bound math、後述)","memory \u003Ccode>feat_g_f16_packed_roi.md\u003C\u002Fcode> + 本 bound check","f16 化を RGB のみに留めた理由は (a) xy\u002Fconic は sort\u002Frasterize の coordinate 計算で f32 精度必要 (b) α (opacity) は compositing で最重要、precision drift で M5 gate を割るリスク — の 2 点。feat.G stage 1 commit body にも明記。全 field f16 化は別実装 (本 finding の §5 alternative 参照)。",{"type":49,"text":93},"2. wallclock ROI 上限 bound (Phase D 375k 文脈)",{"type":95,"text":96},"paragraph","memory \u003Ccode>feat_g_f16_packed_roi.md\u003C\u002Fcode> に記録された旧評価 (~1% wallclock) は \u003Cstrong>83k splat baseline\u003C\u002Fstrong> での timing breakdown に依拠:",{"type":98,"lang":99,"text":100},"code","text","旧 timing breakdown (83k splats、broken H.A 30k bench から):\n  ts_forward        49.5%   (forward 全体)\n  ts_fw_sort        22.3%   ← bandwidth 削減対象外\n  ts_fw_emit        18.1%   ← bandwidth 削減対象外\n  ts_fw_rasterize    5.4%   ← packed forward 対象 (rasterize.metal)\n  ts_fw_offsets      2.2%\n  ts_fw_project      1.5%   ← packed project 対象 (project.metal)\n  ts_project_back    0.5%   ← packed backward 対象 (rasterize_backwards.metal)\n  (backward ~5% 推定)\n\npacked 削減対象合計 ≈ 12% of wallclock\n× 11% bandwidth 削減  = **~1.3% wallclock 改善 (83k splat 時)**\n",{"type":95,"text":102},"\u003Cstrong>Phase D 375k へのスケーリング bound\u003C\u002Fstrong>:",{"type":104,"ordered":105,"items":106},"list",true,[107,108,109,110],"\u003Cstrong>rasterize fwd+bwd の wallclock share は splat count linear ではない\u003C\u002Fstrong>: per-tile work は (overlapping splats \u002F tile) に依存。375k \u002F 83k = 4.5x splat 増だが、tile 当たり overlapping splats は ~2-3x のオーダー (画面解像度固定なので)。","\u003Cstrong>sort (radix) は O(N log N)\u003C\u002Fstrong> → 22.3% share が更に膨張、bandwidth 削減対象外なので相対的に packed の share が下がる方向に効く","\u003Cstrong>best-case bound\u003C\u002Fstrong>: rasterize fwd+bwd share が 83k 時 ~10% → 375k 時 ~30% (3x 膨張仮定) → bandwidth 削減 11% × 30% = \u003Cstrong>~3.3% wallclock 上限\u003C\u002Fstrong>","\u003Cstrong>realistic estimate\u003C\u002Fstrong>: share 拡大は 1.5-2x 程度の方が現実的 → 15-20% share × 11% = \u003Cstrong>~1.7-2.2% wallclock 改善\u003C\u002Fstrong>",{"type":44,"label":112,"variant":46,"text":113},"結論 (ROI bound)","Phase D 375k 文脈で f16 packed の wallclock ROI は \u003Cstrong>realistic 1.7-2.2% \u002F ceiling 3.3%\u003C\u002Fstrong>。user brief の 20-40% 期待値からは \u003Cstrong>6-12 倍下回る\u003C\u002Fstrong>。実装の物理特性 (RGB のみ f16 化、bandwidth 削減 11%) と Phase D 30k の timing structure (sort 22% \u002F emit 18% が bandwidth 削減対象外で支配的) を考慮すると、user brief の期待は何らかの prior misunderstanding (恐らく全 field f16 化を仮定) に由来する。",{"type":49,"text":115},"3. PSNR drift リスクと M5 gate margin との衝突",{"type":52,"columns":117,"align":120,"rows":122,"caption":143},[54,118,119],"値","出典 \u002F 計算",[59,121,59],"right",[123,127,131,135,139],[124,125,126],"RGB f16 max rel error (per-splat round-trip)","5e-4","feat.G stage 1 unit test (splat2d_packed_color_within_f16_precision)",[128,129,130],"compositing 累積後の RGB drift","~1e-3 帯","feat.G stage 2 forward eq test: tol 5e-3 で pass、現実 drift は 1e-3 オーダー",[132,133,134],"PSNR drift 想定 (RGB error → log10 PSNR)","0.1-0.5 dB","保守的推定: 1e-3 RGB drift × 2 (compositing) → MSE 増加 ~2e-6 → ΔPSNR 0.1-0.5 dB",[136,137,138],"M5 Lego val gate margin (現状)","**+0.11 dB**","Phase D 30k 36.106 dB vs M5 target 36 dB",[140,141,142],"**Net**: M5 gate 維持確率","**低**","想定 drift 0.1-0.5 dB > margin 0.11 dB","RGB f16 quantization は理論上 small error だが、Phase D で M5 Lego val gate に既に gilded margin (+0.11 dB) で乗っている。0.2-0.5 dB 程度の drift で M5 を割る可能性、これは卒論の central evaluation table での \"M5 gate 達成\" 主張を pull back する重大 risk。",{"type":49,"text":145},"4. trainer 統合 cost",{"type":95,"text":147},"memory \u003Ccode>feat_g_branch_state.md\u003C\u002Fcode> に記録された通り、feat.G stage 3a (cherry-pick 対象) は \u003Cstrong>trainer dispatch 未統合\u003C\u002Fstrong>。kernel pair + Rust glue + test は完成しているが、`Trainer::forward_step` \u002F `Trainer::backward_step` から packed kernel を呼ぶ route が無く、`splat-cli\u002Fsrc\u002Fcmd\u002Ftrain.rs` で B.1 (RunSummary 統合) と merge conflict 必至。",{"type":104,"ordered":105,"items":149},[150,151,152,153,154],"\u003Cstrong>cherry-pick 3 commit (5a22770, d01d6cf, ba740a4)\u003C\u002Fstrong>: kernel + glue 部分は base がほぼ独立 (splat-core\u002Ftypes.rs + shaders\u002F) なので conflict 軽微","\u003Cstrong>trainer dispatch 配線\u003C\u002Fstrong> (~1 h): \u003Ccode>BackendConfig.splat2d_layout: \"fp32\" | \"packed\"\u003C\u002Fcode> 追加、\u003Ccode>ForwardState\u003C\u002Fcode> に packed buffer 持たせる、forward\u002Fbackward で switch、ParamBuffer pool 拡張","\u003Cstrong>config flag 流す\u003C\u002Fstrong> (~0.5 h): TOML schema + parse + CLI","\u003Cstrong>5k smoke + 30k validation\u003C\u002Fstrong> (~1 h + 42 min): PSNR drift 計測、wallclock 改善 ROI 確認","\u003Cstrong>合計 ~2.5 h work\u003C\u002Fstrong> for bounded ROI 1.7-2.2% wallclock with PSNR M5 regression risk",{"type":44,"label":156,"variant":46,"text":157},"Cost-benefit conclusion","\u003Cstrong>~2.5 h subagent work × bounded ~1.7-2.2% wallclock × M5 regression probability ~50%\u003C\u002Fstrong> (drift 0.1-0.5 dB vs margin 0.11 dB) = \u003Cstrong>negative expected utility\u003C\u002Fstrong>。同 2.5 h を使うなら sort kernel 高速化 (share 22%、ROI 上限大) や emit kernel 高速化 (share 18%) の方が leverage 桁違いに大きい。",{"type":49,"text":159},"5. もし真に bandwidth-ROI が見たいなら (alternative axes)",{"type":95,"text":161},"user brief の根本動機が \"Phase D 375k で bandwidth bound を可視化したい\" なら、より大 ROI の alternative がある:",{"type":52,"columns":163,"align":167,"rows":168,"caption":192},[164,165,87,166],"alternative","scope","PSNR risk",[59,59,121,59],[169,174,179,184,188],[170,171,172,173],"**full f16 Splat2D** (xy + conic も f16)","kernel 再書き直し、precision 検証必要","~5-8% (32→18 byte で本物の bandwidth 半減)","xy\u002Fconic 精度低下で sort 順序変化、>1 dB drift リスク",[175,176,177,178],"**sort kernel 高速化** (radix 8-bit prefix)","新 kernel、A.x で 1 件 reject 済 (variance)","~5-10% (share 22% × ~30-50%)","ゼロ (algorithm 等価)",[180,181,182,183],"**emit kernel 高速化** (tile_bin 並列度上げ)","新 kernel、未調査","~3-6% (share 18% × ~15-30%)","ゼロ",[185,186,187,183],"**rasterize threadgroup memory layout 最適化**","既存 kernel 改変、A.x で深掘り余地","~2-4%",[189,190,191,133],"A.6 f16 packed (RGB のみ、現実装)","trainer 統合 ~2.5 h","**~1.7-2.2%**","user brief の動機 \"bandwidth bound 顕在化\" を真に追求するなら full f16 Splat2D が筋だが、xy\u002Fconic 精度低下が sort key を変えて PSNR を大きく崩す可能性。確実な ROI は sort\u002Femit kernel 側で取る方が leverage 高い。",{"type":49,"text":194},"6. 旧 A.6 close-out (2026-05-23) との関係",{"type":95,"text":196},"\u003Ccode>a-6-feat-g-packed-investigation.toml\u003C\u002Fcode> (2026-05-23) で既に A.6 は \u003Cstrong>\"kernel pair 完成 + ROI ~1% で close\"\u003C\u002Fstrong> としていた。本 finding は同じ結論を \u003Cstrong>Phase D 文脈で再検証\u003C\u002Fstrong> したもの:",{"type":104,"items":198},[199,200,201],"旧 finding: 83k splat baseline、ROI ~1% \u002F kernel pair 完成 \u002F trainer 統合 deferred","本 finding (rebench): 375k splat (Phase D 30k) 文脈、ROI 上限 ~3.3% に上昇するも 期待 20-40% には遠く、加えて M5 gate margin 干渉発見 → \u003Cstrong>defer 結論を strengthen\u003C\u002Fstrong>","user brief の 18 byte \u002F -50% bandwidth \u002F -20-40% wallclock は \u003Cstrong>factual error\u003C\u002Fstrong>、旧 finding 時点で既に commit body に明記されていた 32 byte \u002F -11% bandwidth を見落とした可能性",{"type":49,"text":203},"7. 結論 (autonomous loop 判断)",{"type":44,"label":205,"variant":206,"text":207},"Decision: A.6 再着手しない、旧 close 維持","success","\u003Cstrong>orientation 段階で halt、bench 不実施\u003C\u002Fstrong>。bound math (~1.7-2.2% realistic \u002F ~3.3% ceiling) × M5 gate regression risk (drift 0.1-0.5 dB vs margin 0.11 dB) × 統合 cost (~2.5 h) で \u003Cstrong>net-negative expected utility\u003C\u002Fstrong>。卒論 central evaluation の \"M5 gate 達成\" 主張を守るため、PSNR drift を伴う optimization は Phase 6 (post-thesis or 軸 1 native kernel 完成後) に再考。\u003Cstrong>同 budget は sort\u002Femit kernel 高速化または full f16 Splat2D 検証に振るべき\u003C\u002Fstrong>。",{"type":49,"text":209},"8. 関連",{"type":104,"items":211},[212,213,214,215,216,217],"旧 close-out: \u003Ccode>a-6-feat-g-packed-investigation\u003C\u002Fcode> (2026-05-23)","Phase D 30k 結果 (本 rebench の baseline): \u003Ccode>p1-d-stage2-30k-results\u003C\u002Fcode>","memory ROI 既知: \u003Ccode>feat_g_f16_packed_roi.md\u003C\u002Fcode>","memory branch 状態: \u003Ccode>feat_g_branch_state.md\u003C\u002Fcode>","feat.G commits: \u003Ccode>5a22770\u003C\u002Fcode> (stage 1 struct), \u003Ccode>d01d6cf\u003C\u002Fcode> (stage 2 forward kernel), \u003Ccode>ba740a4\u003C\u002Fcode> (stage 3a backward kernel)","feat.G branch (cherry-pick 元): \u003Ccode>feat-g-f16-packed-takeup\u003C\u002Fcode>",[],[220,249],{"id":30,"title":221,"date":9,"status":10,"polarity":222,"category":223,"axes":224,"tags":227,"task_code":238,"related_runs":239,"delta_psnr":243,"delta_wallclock":244,"rank":245,"verdict":246,"impact_summary":247,"detail_path":248},"P1.D Stage 2 — Lego brushcompat + opacity decay 30k = 36.106 dB、splats -56% \u002F wallclock -32%","positive","experiment",[225,226,14],1,2,[228,22,229,230,231,232,233,234,235,236,237],"p1","milestone-m5","opacity-decay","brush-parity","win-win-win","premultiplied","lego-30k","stage-2","splat-efficient","axis-1-prep","P1.D Stage 2 (M5 Lego val pass)",[240,241,242],"lego-brushcompat-opacdecay-30k","lego-brushcompat-base-30k","lego-brushcompat-opacdecay-5k","+0.92 dB vs baseline 30k (35.184 → 36.106)","-32% vs baseline 30k (1h 02m 18s → 41m 54s)","high","accepted-decisive-win","Lego brushcompat + opacity decay 30k で training-time eval 36.106 dB (val 100 view, brush convention, raw)、independent eval 36.163 dB (brush q8)。baseline 30k (35.184 dB) を **+0.92 dB 上回り**、splats を 846,689 → 375,146 に **-55.6% 削減**、wallclock を 1h 02m → 41m 54s に **-32% 短縮**。これは trade-off と想定していた PSNR\u002Fsplats\u002Fwallclock が **完全 win-win-win** に。M5 個別 scene gate (Lego brush conv > 36 dB) を val で達成、brush 自身 val 32.038 dB を +4.07 dB 上回り、本実装が brush を decisive に超えた。test subset (n=36) も +0.75 dB 改善 (33.315 → 34.065)、brush paper test 37.40 との gap を -3.34 dB まで縮小。Stage 1 smoke 推定 (splats -11.6%) を 30k で -56% に拡大、opacity decay の効果は iter 累積で増大することを実証。次 step は multi-scene Phase D 7 scene re-chain (chain 完了後 schedule)、低 wallclock + 低 splats での M5 multi-scene parity 完遂を狙う。","\u002Ffindings\u002Fp1-d-stage2-30k-results\u002F",{"id":29,"title":250,"date":251,"status":10,"polarity":12,"category":11,"axes":252,"tags":253,"task_code":256,"related_runs":257,"delta_psnr":-1,"delta_wallclock":258,"rank":34,"verdict":259,"impact_summary":260,"detail_path":261},"A.6 #feat.G f16 packed Splat ROI 再評価 — kernel pair は完成、trainer integration は未着手で close","2026-05-23",[14],[16,18,19,20,21,254,25,255],"investigation","metal","A.6",[],"~1% (既知、bench 不実施)","investigative","Splat2DPacked kernel pair は完成 (cargo test 73\u002F73 pass) だが、trainer forward path は fp32 path のみで packed kernel を呼ぶ route がない。理論上 -39% memory traffic \u002F splat だが kernel pair 単独 bench で wallclock 効果 ~1% と既知。close。","\u002Ffindings\u002Fa-6-feat-g-packed-investigation\u002F",1782449788618]